Memory element i.e. bipolar switching memory element, for resistive RAM, has memory cell connected in series with another memory cell, where each cell exhibits two stable states with respective high and low electrical resistances

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This patent describes a resistive memory element for use in resistive RAM (ReRAM) that consists of two memory cells connected in series. Each cell has two stable electrical resistance states (high and low), allowing it to store binary information. The memory element's resistance can be switched between different states using specific voltage levels for writing and can be read using a lower voltage.

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• Non-volatile memory modules in computers and mobile devices
• High-density data storage for enterprise storage systems
• Memory arrays for configurable logic circuits
• Secure storage solutions where data retention without power is required
• Memory integration in Internet of Things (IoT) devices

BenefitsContent extracted from patent full text and abstract with AI.

• Enables high-density memory storage due to series connection and multiple state options
• Provides non-volatile storage, retaining data even when power is off
• Potential for faster switching and lower energy consumption compared to traditional memory technologies
• Scalable design suited for miniaturization and memory stacking
• Suitable for logic-in-memory architectures, supporting new computing paradigms

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Patent Abstract

The element has a memory cell (A) connected in series with another memory cell, where each cell exhibits one stable state with high electrical resistance and another stable state with low electrical resistance. The element is transferable into a high-impedance state by applying write voltage in the former stable state and into another high-impedance state by applying another write voltage in the latter stable state. The memory element exhibits different electrical resistance values by applying read voltage, where amount of read voltage is smaller than the write voltages. Independent claims are also included for the following: (1) a method for operating a memory element, a stack of memory elements or a memory matrix (2) a method for determining a logical value of logic interconnection of two variables in an array of memory elements.