Method for Depositing a Crystal Layer at Low Temperatures, in Particular a Photoluminescent Iv-Iv Layer on an Iv Substrate, and an Optoelectronic Component Having Such a Layer
Simple SummaryContent extracted from patent full text and abstract with AI.
This patent describes a method for depositing high-quality, monocrystalline IV-IV semiconductor layers (such as GeSn or SiGeSn) on silicon or germanium substrates at relatively low temperatures (300°C to 475°C). The process uses specific chemical precursors and inert carrier gases to facilitate the growth of thick, defect-minimized crystal layers that exhibit photoluminescence due to a direct bandgap, which is valuable for optoelectronic applications. The resulting layers are suitable for integration into optoelectronic components like lasers and photodetectors on conventional silicon chips.
Use CasesContent extracted from patent full text and abstract with AI.
- Manufacturing high-efficiency photodetectors or photodiodes based on silicon-compatible materials.
- Production of lasers and light-emitting diodes (LEDs) directly integrated onto silicon chips for on-chip optical communication.
- Development of high-performance CMOS or microprocessor chips with integrated optical interconnects (electro-optical integrated circuits).
- Creation of integrated sensor arrays for imaging or sensing applications, leveraging the photoluminescent layers.
- Fabrication of advanced optoelectronic components compatible with existing silicon semiconductor manufacturing infrastructure.
BenefitsContent extracted from patent full text and abstract with AI.
- Allows growth of photoluminescent, direct-bandgap IV-IV semiconductor layers on silicon substrates, overcoming previous materials limitations.
- Operates at relatively low temperatures, minimizing thermal stress and process-induced defects.
- Achieves low dislocation densities in thick epitaxial layers (≥200 nm), resulting in improved material quality.
- Enables monolithic integration of optically active components on standard silicon chips, reducing size and cost of optoelectronic systems.
- Supports higher tin concentrations in GeSn or SiGeSn layers, resulting in enhanced luminescence necessary for efficient light emission.
- Reduces process complexity and defect generation compared to high-temperature or multi-step approaches.
- Facilitates the development of silicon-based photonic and optoelectronic systems for faster, more energy-efficient data transmission.
Technical Classifications (CPCs)
Main Classifications
Chemistry & Materials Science
Electrical & Electronic Tech
Sub Classifications
Crystal Growth
Dyes, Paints & Adhesives
Electric Elements
CPC Codes
Inventors & Applicants
Applicants
Forschungszentrum Juelich Gmbh
Patent Abstract
The invention relates to a method for monolithically depositing a monocrystalline IV-IV layer that glows when excited and that is composed of a plurality of elements of the IV main group, in particular a GeSn or Si-GeSn layer, said IV-IV layer having a dislocation density less than 6 cm-2, on an IV substrate, in particular a silicon or germanium substrate, comprising the following steps: providing a hydride of a first IV element (A), such as Ge2H6 or Si2H6; providing a halide of a second IV element (B), such as SnCl4; heating the substrate to a substrate temperature that is less than the decomposition temperature of the pure hydride or of a radical formed therefrom and is sufficiently high that atoms of the first element (A) and of the second element (B) are integrated into the surface in crystalline order, wherein the substrate temperature lies, in particular, in a range between 300°C and 475°C; producing a carrier gas flow of an inert carrier gas, in particular N2, Ar, He, which in particular is not H2; transporting the hydride and the halide and decomposition products arising therefrom to the surface at a total pressure of at most 300 mbar; depositing the IV-IV layer, or a layer sequence consisting of IV-IV layers of the same type, having a thickness of at least 200 nm, wherein the deposited layer is, in particular, a SiyGe1 -x-ySn layer, with x > 0.08 and y ≤ 1.
Key Information
Publication No.
WO2015189004A1
Family ID
53276085
Publication Date
2015-12-17
Application No.
EP2015060881W
Application Date
2015-05-18
Priority Date
2014-06-13
Granted
Yes (3/10)
Possible Cooperation
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