Memory Cell and Operation of the Memory Cell

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This invention describes a new type of memory cell that uses a structured sequence of semiconductor and dielectric layers to store information by collecting charge carriers at specific surfaces. Unlike traditional DRAM memory, this memory cell does not require a separate capacitor and can store more than two different (multi-level or analog) memory states. Notably, the device is optimized for operation at cryogenic (very low) temperatures and can retain stored information for extended periods, making it suitable for advanced computing systems such as quantum computers and neuromorphic (brain-like) hardware.

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• Memory modules in quantum computers that operate near absolute zero temperature.
• Analog memory or multi-state memory applications for neuromorphic (brain-inspired) computing systems.
• Non-volatile memory for scientific instruments operating at cryogenic temperatures, such as those used in space exploration or fundamental physics experiments.
• Highly integrated memory arrays where footprint reduction is critical (e.g., advanced semiconductor chips).
• Advanced image or light sensors that use the same storage principle for data acquisition and retention.

BenefitsContent extracted from patent full text and abstract with AI.

• Enables multi-state (not just binary) memory storage, allowing for higher data density and analog information retention.
• Operates efficiently at very low (cryogenic) temperatures, making it suitable for quantum computing and scientific instrumentation.
• Reduces physical footprint by eliminating the need for large capacitors seen in conventional DRAM cells, aiding high-density integration.
• Potential for analog memory and synapse-like behavior, facilitating neuromorphic and AI hardware applications.
• Can retain information for extended periods even at room temperature when designed with specific structures, enabling persistent memory for neuromorphic and sensor systems.

Technical Classifications (CPCs)

Inventors & Applicants

Patent Abstract

The invention relates to a memory cell which has a layer (101) for collecting charge carries at a surface of the layer (101), an electrically insulating layer (102) on the surface provided for collecting charge carriers, a low-doped, semiconducting layer (103) on the electrically insulating layer (102), a dielectric layer (106) on the low-doped, semiconductor layer (103), an electrical contact (107) which is used as a gate terminal and is located on the dielectric layer (106), an electrical contact used as a source terminal (105a), and an electrical contact used as a drain terminal (105b), wherein the dielectric layer (106) is located between the source terminal (105a) and the drain terminal (105b). The invention relates to a method for operating a memory cell of this type. The memory cell can be operated at cryogenic temperatures and can store more than two different states.