Resistive Storage Cell, Crossbar Array Circuit, Resistive Random Access Memory Device and Read-out-method

Simple SummaryContent extracted from patent full text and abstract with AI.

The invention introduces a novel resistive storage cell for memory devices, specifically for resistive random access memory (RRAM). Unlike conventional designs, each cell uses two functionally identical resistive switching storage members connected in series but oriented anti-parallel, forming what is referred to as a resistive double switch (RDS). This configuration significantly reduces unwanted parasitic currents commonly found in crossbar memory arrays and improves the cell's read-out performance. The invention also covers crossbar array circuits, RRAM devices comprising these cells, and specific read-out and writing methods to operate them effectively.

Use CasesContent extracted from patent full text and abstract with AI.

• Non-volatile memory technology for computers and servers (resistive RAM, RRAM)
• Embedded memory in system-on-chip (SoC) and microcontroller applications
• Mass storage solutions such as SSDs and high-density memory cards
• Low-power memory for mobile devices, wearables, and IoT sensors
• Neuromorphic computing systems and artificial synapses requiring highly scalable memory arrays
• Radiation-resistant memory for aerospace and defense applications

BenefitsContent extracted from patent full text and abstract with AI.

• Drastically reduces parasitic and leakage currents, leading to better energy efficiency and lower static power consumption in memory arrays.
• Allows for higher density memory arrays due to minimized interference, enabling further miniaturization and 3D stacking.
• Improves read-out fidelity and speed, supporting larger and more reliable crossbar arrays.
• Eliminates the need for additional active switching devices (e.g., transistors) at the memory cell level, reducing complexity and footprint of the memory array.
• Bipolar storage cell design enables lower programming currents and better scaling of device performance with shrinking feature sizes.
• Supports simple integration with CMOS-based control and sensing circuits for hybrid memory architectures.

Technical Classifications (CPCs)

Inventors & Applicants

Patent Abstract

The invention relates to a resistive storage cell. According to the invention said resistive storage cell is a passive resistive storage cell (22) comprising a pair of two at least functionally identical resistive switching storage members (34, 36), said two resistive switching storage members (34, 36) are connected in series in a serial connection path (32) and are electrically anti-parallel orientated within the serial connection path (32). The invention further relates to a corresponding crossbar array circuit (12) comprising a plurality of said resistive storage cells (22), a corresponding resistive random access memory device (10) and a method for reading out information from a bipolar resistive storage cell.