Multi-gate SOI-LDMOS device structure
Simple SummaryContent extracted from patent full text and abstract with AI.
This invention introduces a new type of multi-gate SOI-LDMOS (Silicon-On-Insulator Lateral Double-diffused MOS) device structure. It features multiple short polysilicon gates separated by dielectric layers, with unique heavy doping regions in the channel. This structure improves electrical and radiation resistance performance.
Use CasesContent extracted from patent full text and abstract with AI.
- Power electronics for automotive and industrial applications
- High-frequency and high-voltage circuit designs
- Electronics operating in radiation-prone environments, such as space or nuclear facilities
- Semiconductor devices where reliability and efficiency are essential
BenefitsContent extracted from patent full text and abstract with AI.
- Higher breakdown voltage for improved durability
- Better transconductance for efficient switching performance
- Lower positive break-over resistance, reducing energy losses
- Reduced self-heating, enhancing device reliability
- Enhanced radiation resistance, making it suitable for harsh environments
Inventors & Applicants
Applicants
Shanghai Inst Microsys & Inf
Forschungszentrum Juelich Gmbh
- No classification data available.
Patent Abstract
The invention provides a multi-gate SOI-LDMOS device structure which comprises an SOI substrate, an active region and a polysilicon gate. The SOI substrate comprises a silicon substrate body, an oxygen buried layer and a top silicon layer, the active region is formed in the top silicon layer and comprises a source region, a channel region, a drift region, a shallow doping drain region and a drain region, the source region, the channel region, the drift region, the shallow doping drain region and the drain region are sequentially connected, the polysilicon gate comprises a gate-oxide layer and a polysilicon layer, the gate-oxide layer is combined to the surface of the channel region, the polysilicon gate is separated by at least one dielectric layer into two short gate structures, and heavy doping regions inversed with the channel region in doping type are formed corresponding to the position, below the dielectric layer, in the channel region. The multi-gate SOI-LDMOS device structure has the advantages of being high in breakdown voltage, good in transconductance characteristic, small in positive break-over resistance, low in self-heating effect and the like. As the heavy doping regions inversed with the channel region in doping type are formed between short gates, when a device is irradiated, the heavy doping regions serve as recombination centers, the large number of recombination centers are provided for electron hole pairs generated by irradiation, and the whole radiation resisting performance of the device is accordingly improved.
Key Information
Publication No.
CN103594517A
Family ID
50084586
Publication Date
2014-02-19
Application No.
CN201310505168A
Application Date
2013-10-24
Priority Date
2013-10-24
Granted
No
Possible Cooperation
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