Circuit for Adjusting Memristor

Publication: EP4462432A1
Published: 2024-11-13
Family Size: 2
Granted: No

Simple SummaryContent extracted from patent full text and abstract with AI.

The patent describes a specialized electronic circuit designed to precisely control the voltage and resistance of a memristor. This circuit uses a combination of a digital-to-analog converter (DAC), operational amplifier (op-amp), transistor (preferably NMOS), and the memristor itself. By utilizing feedback mechanisms, the circuit ensures the voltage across the memristor is highly accurate and stable, regardless of external influences like thermal fluctuations or component variations. The solution can also reset the memristor and be easily expanded for parallel or matrix-based computational tasks, such as vector multiplication and addition, making it well-suited for complex analog computing and memory operations.

Use CasesContent extracted from patent full text and abstract with AI.

  • Precise tuning and programming of memristors in memory arrays for non-volatile storage applications.
  • Enabling accurate analog in-memory computing, such as vector-matrix multiplication for artificial intelligence (AI) and neural networks.
  • Analog signal processing circuits where memristor state control is critical.
  • Implementation in neuromorphic hardware architectures, which use memristors to emulate synapses in brain-inspired computing.
  • Building adaptable or self-learning hardware systems that require frequent memristor reconfiguration.
  • Testing and characterization tools for memristor research and development.
  • Low-power and high-density computational structures for edge computing devices.

BenefitsContent extracted from patent full text and abstract with AI.

  • Significantly improved precision in adjusting the resistance (state) of memristors via controlled voltage application.
  • Stability of operation is maintained even under temperature changes or variations between individual electronic components.
  • Supports parallel and scalable circuit architecture with easy expansion (columns/rows), making it suitable for large-scale matrix operations.
  • Integrated reset functionality enables restoring memristors to initial states, supporting repeated use and longer hardware lifespan.
  • Efficient readout of current and digital conversion, facilitating easy integration into digital systems and further processing.
  • Lower wiring and implementation complexity in large memory or computational arrays due to smart physical layout options.

Technical Classifications (CPCs)

Main Classifications

Physics & Measurement

Sub Classifications

Information Storage

CPC Codes

G11C8/08G11C13/0007G11C13/0028G11C13/003G11C13/004

Inventors & Applicants

Applicants

Forschungszentrum Juelich Gmbh

Patent Abstract

The invention relates to a circuit comprising an analog-to-digital converter (1), an operational amplifier (2), a memristor (3) and a transistor (4), wherein the output of the analog-to-digital converter (1) is electrically conductively connected to a first input of the operational amplifier (2) and the drain terminal of the transistor (4) as well as a first electrical terminal of the memristor (3) are electrically conductively connected to the second input of the operational amplifier (2) and wherein the output of the operational amplifier (2) is electrically conductively connected to the gate terminal of the transistor (4). By means of the circuit, a desired voltage can be applied to the memristor (3) with very high precision. The circuit can be used for arithmetic operations.

Key Information

Publication No.

EP4462432A1

Family ID

90059356

Publication Date

2024-11-13

Application No.

EP24159679A

Application Date

2024-02-26

Priority Date

2023-05-12

Granted

No

Possible Cooperation

For further information please contact the transfer office.