Method for Reading a Resistive Memory Cell and a Memory Cell for Implementation
Simple SummaryContent extracted from patent full text and abstract with AI.
This invention describes a method for non-destructive reading of resistive memory cells (RRAM) that use ion-conductive resistive materials. By carefully controlling the voltage pulse applied during reading (in terms of strength and duration), the memory cell enters a temporary, volatile low-resistance state (VRS) instead of permanently altering its memory state. After reading, the cell reliably returns to its original state, ensuring that the data remains intact. The invention also covers the design of such memory cells and their arrangements, especially in large memory arrays.
Use CasesContent extracted from patent full text and abstract with AI.
- Non-volatile memory in computers, smartphones, tablets, and other electronic devices.
- Mass storage memory solutions combining the speed of DRAM with the persistence of flash memory.
- Next-generation universal memory (storage-class memory) for data centers and servers.
- Memory arrays in neuromorphic (brain-inspired) computing hardware.
- Advanced programmable logic devices and embedded systems needing frequent, fast, and reliable non-volatile memory reads.
BenefitsContent extracted from patent full text and abstract with AI.
- Non-destructive readout—data remains intact after reading, improving memory reliability and endurance.
- Allows much larger memory arrays, overcoming signal loss and interference problems of earlier non-destructive readout techniques.
- Combines fast access times (like DRAM) with non-volatility (like flash), paving the way for universal memory solutions.
- Reduces energy consumption and increases device lifetime, as fewer write/refresh cycles are needed.
- Broadly compatible with different resistive cell materials and structures, including arrays of serially-connected cells.
- Enables strong, clearly detectable readout signals, even in large memory arrays.
Technical Classifications (CPCs)
Main Classifications
Electrical & Electronic Tech
Physics & Measurement
Sub Classifications
Information Storage
Semiconductor & Solid-State Devices
CPC Codes
Inventors & Applicants
Applicants
Forschungszentrum Juelich Gmbh
Rheinisch Westfälische Tech Hochschule Aachen
Patent Abstract
The invention has involved the development of a method for reading a resistive memory cell that has two electrodes spaced apart from one another by an ion-conductive resistive material and that can be transferred from a stable state having a relatively high resistance value (high resistive state, HRS) to a stable state having a relatively low resistance value (low resistance state, LRS) by applying a write voltage. According to the invention, reading involves a read voltage being applied as a read pulse, wherein the number of ions driven through the ion-conductive resistive material during the pulse is set by means of the level and duration of the pulse such that, on the basis of the state for forming an electrically conductive path through the ion-conductive resistive material, they suffice at least until the onset of a flow of current through this path and hence for the transition to a metastable state VRS (volatile resistance state) with a reduced resistance value and a prescribed relaxation time for the return to the HRS state, but not for the transition to the LRS state. This ensures that the memory cell is always back in the same state after reading as before reading. This renders particularly memory elements that consist of two memory cells in reverse-connected series being nondestructively readable without this diminishing the possibility of producing large arrays from these memory elements.
Key Information
Publication No.
DE102013020517A1
Family ID
52391718
Publication Date
2015-06-11
Application No.
DE102013020517A
Application Date
2013-12-11
Priority Date
2013-12-11
Granted
Yes (3/10)
Possible Cooperation
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