Method for Producing Periodic Crystalline Silicon Nanostructures

Publication: DE102011111629A1
Published: 2013-02-28
Family Size: 8
Granted: Yes (3/8)

Simple SummaryContent extracted from patent full text and abstract with AI.

This invention describes an affordable and scalable process for producing large-area, periodically structured crystalline silicon nanostructures with lattice constants ranging from 100 nm to 2 µm. The method involves creating a periodically patterned substrate (such as glass), depositing a silicon layer through a targeted process like electron beam evaporation, and then thermally treating the silicon layer to achieve crystallization. Optionally, a selective wet etching step can remove porous silicon regions to further refine the nanostructures. This process enables fabrication of silicon-based photonic crystals and nanostructures with high precision and structural control.

Use CasesContent extracted from patent full text and abstract with AI.

  • Manufacture of photonic crystals for optical communication devices operating at telecom wavelengths (e.g., 1.33 µm and 1.5 µm)
  • Production of advanced optical filters and waveguides in integrated photonic circuits
  • Fabrication of highly efficient thin-film silicon solar cells
  • Design of sensors and biosensors based on nanostructured silicon platforms
  • Creation of light management layers to enhance optoelectronic device performance (such as LEDs or photodetectors)

BenefitsContent extracted from patent full text and abstract with AI.

  • Enables large-area fabrication (scalable to 10x10 cm² and beyond), overcoming prior size limitations of photonic nanostructures
  • Cost-effective and less technically demanding compared to conventional lithography or nano-fabrication methods
  • Supports precise control over nanostructure period and dimensions for targeted optical properties (including telecom bands)
  • Compatible with common substrates like glass that can withstand necessary thermal treatments
  • Allows for the removal of unwanted porous regions, yielding high-quality free-standing crystalline silicon nanostructures
  • The process is adaptable to various deposition techniques and substrate geometries

Technical Classifications (CPCs)

Main Classifications

Electrical & Electronic Tech

Physics & Measurement

Sub Classifications

Electric Elements

Optics

Semiconductor & Solid-State Devices

CPC Codes

G02B1/005G02B6/13H01L21/02667H10D62/40

Inventors & Applicants

Applicants

Helmholtz Zent B Mat & Energ

Patent Abstract

An inexpensive method for producing periodic crystalline silicon nanostructures of large surface area comprises at least the following steps: generating a periodic structure having a lattice constant of between 100 nm and 2 µm on a substrate, the substrate used being a material which is stable at up to at least 570°C, and the structure being produced with periodically repeating shallow and steep areas/flanks, and, subsequently, depositing of silicon by means of a directed deposition method onto the periodically structured substrate, with a thickness in the range from 0.2 to 3 times the lattice constant - in other words from 40 nm to 6 µm - at a substrate temperature of up to 400°C, followed by thermally treating the deposited Si layer to effect solid-phase crystallization, at temperatures between 570°C and 1400°C, over a few minutes up to several days. In an optional wet-chemical selective etching step, to be carried out subsequently, the resultant porous regions of the Si layer are removed.

Key Information

Publication No.

DE102011111629A1

Family ID

47148858

Publication Date

2013-02-28

Application No.

DE102011111629A

Application Date

2011-08-25

Priority Date

2011-08-25

Granted

Yes (3/8)

Possible Cooperation

For further information please contact the transfer office.