Semiconductor stack and method for its manufacture

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Publication: DE102018115222A1
Published: 2020-01-02
Family Size: 8
Granted: Yes (2/8)

Simple SummaryContent extracted from patent full text and abstract with AI.

This patent discloses a semiconductor layer stack structure and its manufacturing method, where at least two differently doped semiconductor layers are stacked such that their individual Fermi levels lie at specific energetic positions within the band gap. By carefully choosing the doping and thickness of each layer, a continuous space charge region is formed across the stack, leading to an overall Fermi level closer to the middle of the band gap. This reduces residual charge carrier concentrations and thereby improves the electrical insulation properties of the semiconductor stack.

Use CasesContent extracted from patent full text and abstract with AI.

  • Fabrication of semi-insulating buffer layers in power electronic devices based on wide-bandgap semiconductors like GaN or SiC.
  • Improved isolation regions in high-frequency or radio-frequency (RF) semiconductor components.
  • Manufacture of more electrically robust LED and laser diode structures.
  • Integrated circuits requiring high-resistivity substrates to reduce leakage currents and enhance performance.
  • Specialized sensors or detectors requiring precise control over carrier concentrations in semiconductor layers.

BenefitsContent extracted from patent full text and abstract with AI.

  • Reduced leakage currents and improved electrical isolation compared to conventional doping strategies.
  • Allows the Fermi level to be engineered closer to the band gap center even when ideal single dopants are not available for a given semiconductor material.
  • Enhances high-voltage and high-frequency device performance and reliability.
  • Flexible adaptation to different semiconductor materials and available dopants.
  • The stack structure and method enable finer tuning of electronic properties for device designers, increasing manufacturing process stability and reproducibility.

Technical Classifications (CPCs)

Main Classifications

Electrical & Electronic Tech

Sub Classifications

Electric Elements

Semiconductor & Solid-State Devices

CPC Codes

H01S5/2227H01S5/3063H01S5/3068H01S5/3077H10D62/8171H10D62/854

Inventors & Applicants

Applicants

Univ Otto von Guericke Magdeburg

Patent Abstract

The invention relates to a semiconductor layer stack, to a component made therefrom and to a component module, and to a production method, the semiconductor layer stack being characterized by at least two layers (A, B), which, as individual layers, each have an energetic position of the Fermi level (103) in the semiconductor band gap (104, 105), formula (I) applying to the layer (A) and formula (II) applying to the layer B, with E F the energetic position of the Fermi level (103), E V the energetic position of a valence band (102), E L the energetic position of a conduction band (101) and E L - E V the energy difference of the semiconductor band gap E G (104, 105), the thickness (106, 107) of the layers (A, B) being selected in such a way that a continuous space charge region (110) over the layers (A, B) results.

Key Information

Publication No.

DE102018115222A1

Family ID

68072085

Publication Date

2020-01-02

Application No.

DE102018115222A

Application Date

2018-06-25

Priority Date

2018-06-25

Granted

Yes (2/8)

Possible Cooperation

For further information please contact the transfer office.