Method of Fabricating a Lattice Structure

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This patent describes a method for fabricating specialized two-dimensional lattice structures, such as kagome lattices, on semiconductor substrates. The invention uses heavy atoms (with atomic number Z ≥ 14, such as lead) deposited on III-V semiconductors (like InAs or GaAs) to create atomically precise arrangements with unique electronic properties. The technique enables the formation of lattice structures with exotic quantum behaviors, useful for advanced electronic and quantum devices.

Use CasesContent extracted from patent full text and abstract with AI.

• Development of spintronic devices for next-generation electronics.
• Platforms for quantum computing, including realization of topologically protected quantum states (Majorana bound states).
• Research and fabrication of topological insulators with spin-polarized edge states.
• Creation of devices exploiting high-temperature fractional quantum Hall effects or unconventional superconductivity.
• Material science research tools for exploring exotic 2D electronic phases in heavy-atom lattices.
• Development of new sensors or components requiring tunable, atomically precise quantum materials.

BenefitsContent extracted from patent full text and abstract with AI.

• Enables the formation of highly ordered 2D lattice structures with heavy atoms, which were previously unachievable.
• Provides a pathway to create materials that exhibit strong spin-orbit coupling and exotic electronic phases, crucial for emerging quantum technologies.
• Versatile fabrication method applicable to various III-V semiconductors and heavy elements, increasing material design flexibility.
• Potential for room temperature operation in some cases due to larger band gaps from heavy atoms, reducing cooling requirements.
• Facilitates the design of fault-tolerant quantum devices, including topological quantum computers, due to robust electronic properties.
• Promotes better integration of quantum or spintronic materials with existing semiconductor device platforms.

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Patent Abstract

According to a first aspect of the disclosure, there is provided a device comprising: a substrate comprising a lll-V semiconductor having a crystalline surface; and a kagome lattice formed from atoms of an element with atomic number Z greater than or equal to 14, deposited on said surface of the semiconductor. According to a second aspect there is provided a fabrication method for forming a kagome lattice or other lattice structure such as a honeycomb or Moire super lattice.