Method for Nano-Fabrication Using Euv-Induced Surface Reactions

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This patent describes a new method for nano-scale patterning on silicon (Si) surfaces using Extreme Ultraviolet (EUV) lithography without requiring traditional photoresist materials. Instead, specific surface chemical treatments are applied to the silicon to make it sensitive to EUV light. When exposed through a mask, the EUV light directly induces chemical reactions on the Si surface, forming high-resolution patterns after simple post-processing steps. This method enables large-area, high-throughput fabrication with improved resolution and without the complications introduced by photoresists.

Use CasesContent extracted from patent full text and abstract with AI.

• Fabrication of advanced semiconductor devices with extremely small features (e.g., transistors, memory chips)
• Manufacturing large-area nano-patterned Si substrates for sensors or photonic devices
• Production of high-density integrated circuits (ICs) using a simpler process flow
• Localized doping of silicon substrates for advanced electronic or optoelectronic applications
• Selective surface modification for nanolithography templates or nanoimprint lithography masters
• Microsystem and MEMS (Microelectromechanical Systems) manufacturing

BenefitsContent extracted from patent full text and abstract with AI.

• Eliminates the need for traditional photoresist materials, simplifying the manufacturing process and reducing material compatibility issues.
• Enables higher resolution patterning by removing the limitations imposed by photoresist thickness and properties.
• Supports large-area and high-throughput patterning compared to direct-write techniques like EBL or STM.
• Reduces risk of pattern collapse and line edge roughness, improving device reliability and performance.
• Allows for versatile post-patterning processes, such as selective film growth, etching, or doping, enhancing process flexibility.
• Potentially reduces manufacturing costs and process complexity for cutting-edge semiconductor and nano-device fabrication.

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Inventors & Applicants

Patent Abstract

It is the objective of the present invention to provide a method for large-area resistless patterning on hydrogen-terminated Si using EUV lithography that yields a high throughput of large-area patterning.This objective is achieved according to the present invention by a method for large-area resistless patterning on surficial-treated Si substrates using EUV lithography, comprising the steps of:a) providing an Si substrate and treating the surface of the Si substrate at least partially in order to achieve an artificial layer or surface structure that is sensitive to EUV irradiation;b) exposing the at least partially treated artificial layer or surface layer selectively to an EUV irradiation through a mask; andc) treating the treated and irradiated Si surface in order to reveal the pattern provided by the mask and formed in the irradiated sections of the exposed regions of the at least partially treated Si surface.As a result, EUV-radiation can be used for high resolution resistless patterning of substrates following a process where the surface of the Si substrate/wafer is at least partially hydrogen-passivated.