A method of making a semiconductor device having an arched structure strained semiconductor layer

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This invention describes a method to make semiconductor devices with an arched, strained semiconductor layer. The process forms a special structure inside a dielectric layer that induces mechanical strain in a single crystal semiconductor layer grown above it. After forming the strained layer, the underlying structure is removed, creating a void (cavity) beneath, which preserves the strain and can be optionally refilled for additional functionality. This approach allows precise control of the strain and device properties, leading to improved transistor performance.

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• Next-generation CMOS transistors for high-performance and low-power integrated circuits
• Production of surround-gate or double-gate MOSFET devices
• Fabrication of 3D-integrated chips due to back-end process compatibility
• Creation of semiconductor devices with adjustable strain for device optimization on the same wafer
• Applications in logic chips, memory chips, and sensors requiring enhanced carrier mobility
• Strained channel transistors for faster digital and analog electronics

BenefitsContent extracted from patent full text and abstract with AI.

• Enables higher carrier mobility and increased drive current in semiconductor devices leading to faster operation
• Provides a simpler and more controllable method to induce strain compared to traditional techniques like buffer layers or wafer bonding
• Allows tuning of strain levels for different devices on the same wafer, offering process flexibility
• Reduces parasitic capacitance and potential energy consumption through the arched, strained channel design
• Supports fabrication of advanced device architectures such as surround-gate or dual-gate transistors for improved channel control
• Facilitates 3D integration due to compatibility with back-end processes
• Provides atomically smooth interfaces in the channel region, which can improve device reliability and performance

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Patent Abstract

A method of forming a semiconductor device includes forming a local straininducing structure of a first semiconductor material at a point location within a dielectric layer. The local strain-inducing structure has a prescribed geometry with a surface disposed above a surface of the dielectric layer. A second semiconductor material is formed over the dielectric layer and the local strain inducing structure, wherein formation of a first portion of the second material over the dielectric layer provides a poly crystalline structure of the second material and wherein formation of a second portion of the second material over the local strain-inducing structure provides a single crystalline structure of the second material subject to mechanical strain by the surface of the local strain-inducing structure. The single crystalline structure serves as a strained semiconductor layer of the semiconductor device.