Silicon Wafer, Method for Structuring a Silicon Wafer, and Solar Cell

Publication: DE102016105866B3
Published: 2017-07-06
Family Size: 4
Granted: Yes (2/4)

Simple SummaryContent extracted from patent full text and abstract with AI.

This invention introduces a method for creating an anti-reflective structure on the surface of a {100}-oriented silicon wafer (often used in solar cells) by etching a random distribution of polyhedral (often pyramid-shaped) recesses using a specific chemical solution and flowing conditions. Unlike traditional methods, which require complex masking or photolithography, this process can be performed in a relatively simple and cost-effective way. The surfaces produced absorb light more efficiently, thereby enhancing the performance of solar cells.

Use CasesContent extracted from patent full text and abstract with AI.

  • Production of high-efficiency silicon solar cells with improved light absorption.
  • Manufacturing of silicon wafers with anti-reflective surfaces for photovoltaic modules.
  • Integration in mass-production lines for photovoltaic wafer/texturing processing.
  • Development of silicon-based photodetectors or other optoelectronic devices that benefit from suppressed surface reflections.
  • Facilitation of advanced research in light management for silicon micro- and nano-fabrication.

BenefitsContent extracted from patent full text and abstract with AI.

  • Enables higher light absorption and conversion efficiency in solar cells due to optimized surface texturing.
  • Eliminates the need for complex, expensive photolithography or masking steps, reducing manufacturing costs.
  • Process is compatible with standard industrial etching equipment and can be easily scaled for mass production.
  • Works at relatively low temperatures (room temperature), saving energy costs and simplifying processing.
  • Allows the use of monocrystalline and quasi-monocrystalline {100} oriented silicon, supporting flexible material choice.
  • Produces dense and randomly distributed microstructures that minimize reflection, improving energy yield from sunlight.
  • Offers controlled process parameters (etching solution composition, flow, temperature) for reproducible and optimized results.

Technical Classifications (CPCs)

Main Classifications

Electrical & Electronic Tech

Sub Classifications

Semiconductor & Solid-State Devices

CPC Codes

H10F71/121H10F77/16H10F77/703

Inventors & Applicants

Applicants

Technische Universität Bergakademie Freiberg

Patent Abstract

According to various embodiments, a silicon wafer (202) is provided, which has a 100-oriented surface (202a), wherein the surface (202a) has a surface structure (204) of a plurality of randomly distributed recesses, said recesses having a polyhedral shape.

Key Information

Publication No.

DE102016105866B3

Family ID

58455052

Publication Date

2017-07-06

Application No.

DE102016105866A

Application Date

2016-03-31

Priority Date

2016-03-31

Granted

Yes (2/4)

Possible Cooperation

For further information please contact the transfer office.