Memory

Publication: US2012155165A1
Published: 2012-06-21
Family Size: 9
Granted: Yes (4/9)

Simple SummaryContent extracted from patent full text and abstract with AI.

This patent describes a memory device based on quantum dots formed inside a strained semiconductor double-heterostructure. The memory features quantum dots that can store charge carriers (specifically holes) in a highly confined and energetically stable way, providing multiple discrete energy states within a narrow energy band. The device structure utilizes resonant tunneling for efficient write and erase operations, enabling nonvolatile memory functionality with long retention, fast operation, and high endurance.

Use CasesContent extracted from patent full text and abstract with AI.

  • Nonvolatile memory in computers and mobile devices to store persistent data with fast access times.
  • Memory components in embedded systems and Internet-of-Things (IoT) devices requiring long-term data retention and low power consumption.
  • Ultrafast cache memory in high-performance computing due to its speedy write and erase cycles.
  • Data storage for industrial or automotive electronics needing higher reliability and endurance.
  • Quantum computing elements or advanced electronics using quantum dot-based architectures.

BenefitsContent extracted from patent full text and abstract with AI.

  • Extremely long data retention time (over 10 years) at room temperature due to high energy barriers and stable quantum dot storage.
  • Very fast write and erase times, surpassing conventional Flash memory, with write times in the nanosecond range and erase times much faster than traditional devices.
  • High endurance with low power consumption, because erase and write operations can be accomplished via resonant tunneling requiring only small voltage changes, minimizing device degradation.
  • Scalability as quantum dot density can be increased to improve storage capacity and reliability, thanks to the closely spaced energy levels for hole storage.
  • Enhanced reliability and data integrity due to multiple energy states and strong confinement of charge carriers.

Technical Classifications (CPCs)

Main Classifications

Electrical & Electronic Tech

Manufacturing & Transport

Sub Classifications

Nanotechnology

Semiconductor & Solid-State Devices

CPC Codes

B82Y10/00H10D30/47H10D30/803H10D48/30H10D48/32H10D62/81

Inventors & Applicants

Applicants

Bimberg Dieter

Geller Martin

Marent Andreas

Nowozin Tobias

Univ Berlin Tech

Patent Abstract

An embodiment of the invention relates to a memory comprising a strained double-heterostructure having an inner semiconductor layer which is sandwiched between two outer semiconductor layers, wherein the lattice constant of the inner semiconductor layer differs from the lattice constants of the outer semiconductor layers, the resulting lattice strain in the double-heterostructure inducing the formation of at least one quantum dot inside the inner semiconductor layer, said at least one quantum dot being capable of storing charge carriers therein, and wherein, due to the lattice strain, the at least one quantum dot has an emission barrier of 1.15 eV or higher, and provides an energy state density of at least three energy states per 1000 nm3, all said at least three energy states being located in an energy band of 50 meV or less.

Key Information

Publication No.

US2012155165A1

Family ID

45476459

Publication Date

2012-06-21

Application No.

US97074410A

Application Date

2010-12-16

Priority Date

2010-12-16

Granted

Yes (4/9)

Possible Cooperation

For further information please contact the transfer office.