Sigma-Delta Analog-to-Digital Converter with gmC-VDAC

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This invention describes a sigma-delta analog-to-digital converter (ADC) architecture that incorporates a transconductance stage (gm) and a voltage-mode digital-to-analog converter (VDAC) in its feedback loop. Unlike conventional designs that use current-mode DACs and resistive elements—often leading to noise, non-linearity, higher power consumption, or larger area—this approach uses a VDAC for feedback, significantly reducing non-linearities, enhancing energy efficiency, and minimizing area and noise while preserving or improving overall converter performance. The architecture is especially suitable for continuous-time ADCs and enables high signal-to-noise ratios and linearity without energy-wasting circuit elements.

Use CasesContent extracted from patent full text and abstract with AI.

• High-resolution audio signal processing for mobile phones and audio interfaces.
• Analog signal digitization in communication systems, especially for wireless base stations or IoT devices requiring low power and high performance.
• Medical devices where accurate analog-to-digital conversion is needed with minimal noise and power consumption.
• Instrumentation and sensor readout where compact ADCs with high linearity and low error are required.
• Consumer electronics needing efficient, accurate analog-to-digital conversion in a small footprint.

BenefitsContent extracted from patent full text and abstract with AI.

• Significantly higher linearity of the analog-to-digital conversion due to the improved feedback design.
• Reduced noise and increased signal-to-noise ratio by eliminating resistive feedback elements that introduce noise and variability.
• Lower energy consumption and improved energy efficiency, making it suitable for battery-powered or portable devices.
• Smaller area (form factor) on silicon, reducing both manufacturing costs and device size.
• Higher robustness against internal non-linearities and external disturbances.
• Allows for higher bandwidth operation without the limitations imposed by resistive components.
• Decouples optimization of noise, linearity, and power, giving designers flexibility to optimize performance for different applications.

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Patent Abstract

The present invention relates to a sigma-delta analogue-to-digital converter. The sigma-delta analogue-to-digital converter has a transconductance stage having a first, second and third connection. A capacitor is parallel-connected to the third connection. The sigma-delta analogue-to-digital converter also has a quantiser at the third connection of the transconductance stage with feedback by means of a voltage digital-to-analogue converter for feeding back a feedback signal to one of the connections of the transconductance stage.