Semiconductor structure e.g. conducting path, testing circuit arrangement, has impulse generator with transmission lines whose impedances form system impedance, and absorption branch with resistance having same value as system impedance

Simple SummaryContent extracted from patent full text and abstract with AI.

This invention is a circuit arrangement for testing semiconductor structures. It uses an impulse generator with matched transmission lines and an absorption branch, where the impedances are matched to prevent signal reflection, allowing accurate testing of devices under test.

Use CasesContent extracted from patent full text and abstract with AI.

• Testing integrated circuit components during manufacturing
• Diagnosing faults in semiconductor devices
• Evaluating the performance of microchips and printed circuit boards
• Quality assurance in electronics production labs

BenefitsContent extracted from patent full text and abstract with AI.

• Accurate testing due to impedance matching, eliminating signal reflections
• Improved reliability and reproducibility of test results
• Applicable to a variety of semiconductor devices and structures
• Helps in early detection of faults, reducing production defects

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Inventors & Applicants

Patent Abstract

The arrangement has an impulse generator with a transmission line (4), which has a length specifying maximum impulse duration and is connected at a direct current voltage source (1). A transmission line (6) connects a device under test at the output of the generator that is formed by a switch. The impedances of the lines form system impedance, and an absorption branch has a resistance with the same value as the system impedance. An independent claim is also included for a method for testing a semiconductor structure by using a circuit arrangement.