Neuromorphic Pattern Detector and Neuromorphic Circuit Arrangement Therewith

Publication: DE102019134044A1
Published: 2021-06-17
Family Size: 1
Granted: No

Simple SummaryContent extracted from patent full text and abstract with AI.

This patent describes a neuromorphic pattern detector and circuit arrangement that processes multiple 1-bit input signals to detect specific patterns based on their signal states ("high" or "low") within a given timeframe. The system uses comparison circuits to count these states and triggers a response if the count surpasses a set threshold, enabling reliable pattern recognition in binary signals.

Use CasesContent extracted from patent full text and abstract with AI.

  • Real-time signal processing in robotics
  • Neuromorphic computing applications for efficient pattern recognition
  • Embedded systems for sensor data analysis
  • Security systems for anomaly detection
  • Industrial automation monitoring for detecting specific operational patterns

BenefitsContent extracted from patent full text and abstract with AI.

  • Enables fast and efficient binary pattern recognition
  • Can be implemented in low-power, neuromorphic hardware
  • Improves accuracy of signal-based detection tasks
  • Adaptable for various digital and analog applications
  • Enhances real-time monitoring and automated response capabilities

Technical Classifications (CPCs)

Main Classifications

Physics & Measurement

Sub Classifications

Computing & Calculating

CPC Codes

G06N3/049G06N3/063

Inventors & Applicants

Applicants

Univ Osnabrueck

Patent Abstract

Die vorliegende Erfindung betrifft einen neuromorphen Musterdetektor (2), welcher ausgebildet ist, wenigstens zwei 1-Bit Eingangssignale (E1-EN) eines zu erkennenden Musters zu erhalten, mit wenigstens zwei Vergleichsschaltungen (3), welche jeweils ausgebildet sind, eines der 1-Bit Eingangssignale (E1-EN) zu erhalten, die Anzahl der „high“-Zustände oder der „low“-Zustände des jeweiligen 1-Bit Eingangssignals (E1-EN) innerhalb eines vorbestimmten Zeitraums zu zählen, die Anzahl der gezählten Zustände mit einem vorbestimmten Schwellwert der jeweiligen Vergleichsschaltung (3) zu vergleichen und bei Überschreiten des Schwellwerts auf die erfolgte Erkennung des zu erkennenden Musters hinzuweisen.

Key Information

Publication No.

DE102019134044A1

Family ID

76085070

Publication Date

2021-06-17

Application No.

DE102019134044A

Application Date

2019-12-11

Priority Date

2019-12-11

Granted

No

Possible Cooperation

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