Electrical Method for Location-Based Operating Temperature Control of a MOS-Controlled Semiconductor Power Device and Device for Performing the Method

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This patent discloses a method and device for locally adjusting the operating temperature of MOS power semiconductor components, which are made up of many identical cells. By dividing the chip’s gate electrode network into several electrically isolated sectors, each can be supplied with a different gate voltage, allowing precise control over the temperature and power distribution within individual areas of the component. This addresses the problem of hot spots and uneven temperature distribution, improving safety and reliability.

Use CasesContent extracted from patent full text and abstract with AI.

• Power MOSFETs and IGBTs in power electronics for automotive, industrial, or consumer devices.
• Smart power integrated circuits (ICs) where thermal management is crucial for long-term reliability.
• Semiconductor devices operating close to their thermal/electrical limits, e.g., high-performance inverters or motor drivers.
• Power modules using silicon or wide band-gap materials (SiC), where uniform thermal distribution extends device lifespan.
• Systems where real-time or area-specific temperature control mitigates the risk of device failure due to overheating.

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• Enables fine-grained (area-specific) control of operating temperature, preventing local overheating (hot spots).
• Improves the reliability and lifespan of power semiconductor devices by maintaining more uniform temperatures.
• Allows for power/temperature management without needing changes to the physical chip layout.
• Reduces the risk of device destruction under demanding electrical/thermal conditions.
• Provides flexibility in design and operation by allowing temperature adjustments in real time, tailored to specific chip areas.
• Can be applied to various device topologies, including those made from silicon or silicon carbide (SiC).

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Patent Abstract

Described is a method for adjusting the operating temperature of MOS power components composed of a plurality of identical individual cells as well as a component for carrying out said method. As a characteristic feature, the gate electrode network (4) of the active chip region is subdivided into several gate electrode network sectors (B1, B2, B3) which are electrically isolated from one another by means of isolating points and to each of which a different gate voltage is fed via corresponding contacts.